1. Field of the Disclosure
The disclosed method relates to a method for manufacturing a semiconductor device; and, more particularly, to a method for manufacturing a complementary metal oxide semiconductor (CMOS) image sensor.
2. Description of the Prior Art
Generally, in a charge couple device (CCD) or a complementary metal oxide semiconductor (CMOS) image sensor, a photodiode (PD), namely a light sensing area, changes an incident light in accordance with each wavelength into an electric signal. An ideal case is that quantum efficiency is one for all wavelengths of light, that is, all the incident light gathered in the photodiode is converted into electric signal.
FIG. 1 is an equivalent circuit diagram of a general CMOS image sensor unit pixel. Referring to FIG. 1, the equivalent circuit includes one photodiode (PD) and four n-channel metal oxide semiconductor (NMOS) transistors (Tx, Rx, Dx, and Sx). The four NMOS transistors are comprised of a transfer transistor (Tx), a reset transistor (Rx), a drive transistor (Dx) and a select transistor (Sx). Outside of the unit pixel (UP), a load transistor (Vb) capable of reading an output signal is formed. A floating diffusion node (FD) (also referred to as a floating sensing node), where an electric charge is transferred from a photodiode (PD), is formed in a same common node.
FIG. 2 is a cross-sectional view showing a conventional unit pixel of a CMOS image sensor shown in FIG. 1.
Referring to FIG. 2, a conventional method for manufacturing a CMOS image sensor will be described.
First, a p-epitaxial layer 12 is grown on a p+-substrate 11. Herein, the p+-substrate 11 is doped with a high concentration of p-type dopant and the p-epitaxial layer 12 is doped with a low concentration of p-type dopant. After growing the p-epitaxial layer 12, a field oxide layer 13, for separating unit pixels, is formed in a predetermined region of the p-epitaxial layer 12 by using a local oxidation of silicon (LOCOS) method.
Thereafter, a p-well 14 is formed in a predetermined region of the p-epitaxial layer 12 with a lateral diffusion caused by a thermal treatment. On the p-well 14, gates of a drive transistor (Dx) and a select transistor (Sx) are formed.
Thereafter, gate electrodes 15a and 15b of the drive transistor (Dx) and the select transistor (Sx), are formed on the p-well 14, and gate electrodes 15c and 15d of the transfer transistor (Tx) and the reset transistor (Rx) are formed on the p-epitaxial layer 12. At this time, the four gate electrodes 15a, 15b, 15c and 15d are formed of a polycide comprising a polysilicon layer and a tungsten silicide layer.
Subsequently, a low concentration of n-type dopant (nxe2x88x92) is injected into the p-epitaxial layer 12 around one side of the gate electrode 15c of the transfer transistor (Tx) with high energy in order to form a nxe2x88x92-diffusion layer 16.
Thereafter, an ion injection process is carried out to form lightly doped drains (LDD) 17 of the drive transistor (Dx) and the select transistor (Sx) . Then, after depositing an insulating layer on the substrate, the insulating layer is etched without an etch mask to form a spacer 18 on each side of the four gate electrodes 15a, 15b, 15c and 15d. 
Then, p-type dopants (pxc2x0) are injected without an ion implantation mask, to form a pxc2x0-diffusion region 19 at the surface of the p-epitaxial layer 12. At this time, the pxc2x0-diffusion layer 19 contacted to the nxe2x88x92-diffusion layer 16 is apart from the gate of the transfer transistor (Tx) as much as the width of the spacer 18.
A shallow PN connection composed of the pxc2x0-diffusion layer 19/the nxe2x88x92-diffusion layer 16 and a PNP-type photodiode composed of the p-epitaxial layer 12/the nxe2x88x92-diffusion layer 16/the pxc2x0-diffusion layer 19 are formed by the above-mentioned processes.
Subsequently, an ion injection process for-forming source/drain region 20 and 20a is carried out. That is, a floating sensing node 20a, which is a common node of the reset transistor (Rx) and the transfer transistor (Tx), and the source/drains 20 of the drive transistor (Dx), the selective transistor (Sx) and the reset transistor, (Rx) are formed. The drive transistor (Dx) and the select transistor are general MOS transistors, and the select transistor (Sx) and the transfer transistor (Tx) are native NMOS transistors.
Subsequently, a tetraethyl orthosilicate (TEOS) layer 21a and a borophosphosilicate glass (BPSG) layer 21b are formed in order to form a pre-metal dielectric (PMD) layer, and the BPSG layer 21b is flowed and flattened by a thermal treatment performed in an ambient atmosphere of N2. After forming the PMD layer, a metal contact hole (not shown) and a first metal wiring (M1, 22) are formed, then an inter-metal-dielectric (IMD) layer 23 is formed on the first metal wiring 22.
Thereafter, a second metal wiring (M2, 24) is formed on the IMD layer 23, and a protection layer 25 is formed on the substrate including the second metal wiring 22 to complete a general process for forming a CMOS logic region. At this time, an oxide layer is usually used as the protection layer 25, and the first metal wiring 22 and the second metal wiring 24 are not overlapped with the photodiode for the transmission of incident light toward the photodiode (PD).
After completing formation processes of the above-mentioned CMOS logic region, three color filters 26 are formed to realize a color image, and an over coating layer 27 is formed for flattening a resulting structure formed on the substrate 11, then a microlens 28 is formed to increase light concentration.
However, in the above-mentioned conventional method for forming the CMOS logic region, dangling bonds (DB) are generated on a surface of the pxc2x0-diffusion layer 19 within a photodiode region, because a plurality of etching processes are carried out to form the field insulation layer by the LOCOS process, to form the gate electrodes and to form the ion implantation mask.
In a boundary of the pxc2x0-diffusion layer 19 formed of silicon and the PMD layer formed of oxide layer, a stable condition is maintained when one silicon atom is combined with two oxygen atoms. However, as shown in FIG. 3, owing to a lot of etching processes, the combination of the pxc2x0-diffusion layer 19 occurs so that dangling bonds of (xe2x80x94Sixe2x80x94O) or (xe2x80x94Sixe2x80x94) are generated.
Therefore, electrons (e) are generated due to the dangling bonds DB at the surface of the pxc2x0-diffusion layer 19 and stored in the nxe2x88x92-diffusion layer 16, whereby a dark current (D) flows from a photodiode (PD) to a floating sensing node (FD) 20, even though light is not incident. In other words, in the case of a light incidence, electrons are generated and stored in a depletion layer (nxe2x88x92-diffusion layer) of a photodiode, and then the electrons are moved to flow a current. However, the dangling bonds (xe2x80x94Sixe2x80x94O or xe2x80x94Sixe2x80x94) on the surface of the pxc2x0-diffusion layer 19 are in a condition of easily generating electric charges even though light is not incident. Accordingly, if a plurality of the dangling bonds DB exists, an image sensor shows an irregular reaction when light is incident, and even in a dark situation.
Moreover, in the conventional method, as shown in FIG. 2, the protection layer 25 is formed only with an oxide layer, therefore, it is impossible to remove the dangling bonds and to suppress the excessive generation of the dark current. Accordingly, a picture quality of an image sensor is deteriorated by the dark current flows to the floating sensing node (FD).
The disclosed method provides a method of manufacturing an image sensor capable of preventing picture quality deterioration, which is caused by a dark current.
In accordance with one aspect of the disclosed method, there is provided a method of manufacturing an image sensor, comprising the steps of: forming a photodiode in a semiconductor substrate; forming a transfer transistor, a reset transistor, a drive transistor and a select transistor on the semiconductor substrate; forming a first interlayer insulating layer on the semiconductor substrate, wherein the first interlayer insulating layer contains hydrogen ions; forming a second interlayer insulating layer on the first interlayer insulating layer; and flattening the second interlayer insulating layer by flowing and simultaneously diffusing the hydrogen ions into a surface of the photodiode.
In accordance with another aspect of the disclosed method, there is provided a method of manufacturing an image sensor, comprising the steps of: forming a photodiode in a semiconductor substrate; forming a transfer transistor, a reset transistor, a drive transistor and a select transistor on the semiconductor substrate; forming a siliconoxynitride layer on the semiconductor substrate, wherein the siliconoxynitride layer contains hydrogen ions; forming a borophosphosilicate glass (BPSG) layer on the siliconoxynitride layer; and flattening the BPSG layer by flowing and simultaneously diffusing the hydrogen ions into a surface of the photodiode.
In accordance with still another aspect of the disclosed method, there is provided a method of manufacturing an image sensor, comprising the steps of: forming a photodiode in a semiconductor substrate; forming a transfer transistor, a reset transistor, a drive transistor and a select transistor on the semiconductor substrate; forming a silicon nitride layer on the semiconductor substrate, wherein the silicon nitride layer contains hydrogen ions; forming a borophosphosilicate glass (BPSG) layer on the silicon nitride layer; and flattening the BPSG layer by flowing and simultaneously diffusing the hydrogen ions into a surface of the photodiode.
In accordance with still another aspect of the disclosed method, there is provided a method of forming an interlayer insulating layer between wirings of an image sensor, comprising the steps of: forming a first interlayer insulating layer on a semiconductor substrate having a photodiode therein, wherein the first interlayer insulating layer contains hydrogen ions; forming a second interlayer insulating layer on the first interlayer insulating layer; and flattening the second interlayer insulating layer and diffusing the hydrogen ions into a surface of the photodiode by performing a thermal treatment.